Philips Internship


The internship selection for Philips is based on the following rounds:
  1. Written test
  2. Technical rounds - 2
  3. HR round 
Written Test:
It consists of C/C++ and some aptitude questions.

Technical Round 1: 
  1. Write a program to check whether given string is palindrome or not.
  2. Write a program which takes a number as an input from user and print it's eqivalent text. For example, suppose user inputs 57. Then output would be Fifty Seven.
  3. Write a program to check a loop exists in a linked list.
  4. Suppose there is a linked list. Write a program to check where linked lists are meeting each other.
  5. Write a program to swap two numbers without using a variable.
  6. Structure vs Class.
  7. Write an algorithm for postorder traversal for the tree.
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Technical Round 2:

  1. Tell me about your project. Write a pseudo code for module you had developed.
  2. Why OOPS is needed?
  3. Private constructor.
  4. Write a program to check a given number is prime or not. Write a optimize code for your answer.
  5. Suppose i want to create only one object for a class then how to do it.
    That is how to allow to create only one object per class.
  6. Which virtual machine is used in Android.
  7. Multi threading VS Muti tasking VS Multi Processing VS Multi Programming.

  1. Tell me about yourself.
  2. Why did you want to do M.Tech?
  3. What do you know about Philips?
  4. Why you want to join Philips?
  5. What new subjects have you learned in M.Tech?
  6. What are your expectations from Philips Internship.
This is a book that I highly recommend for anyone to improve on their soft skills. This will not just help in your interviews but also in your day-to-day work.

Cadence Internship - Selection process and Questions


Cadence internship test involves the following processes
·        Screening round
·        Technical round
·        HR round

Screening round:

The screening round consists of 10 subjective questions to be solved in 60 minutes. The the following are the 10 questions asked:
1.      Design a T-flip flop using a D-flip flop.
2.      Design a counter using D flip flop(mod 10)
3.      Calculate the setup time and hold time for a given set of specifications. It had sub questions to calculate setup margin and hold margin.
4.      A motor witha circular sheet conneted to it. Circle is painted black and white equally. Two sensors are connected to the circle making an arc of 90 degree. Design a digital logic to find the direction of the motor if clock wise or anti clock wise.
5.      Two current sources are connected in series with a resistor in between them.Find the voltage between the resistor?
6.      There are N teams in a cricket match. How many matches have to be played to know the winner and the runner-up?
7.      Consider an ant on the corner of a match box(Solid). Find the shortest path for the ant to travel from the current position to the diagonally opposite corner. Case 1 with all side equal and Case 2 with different values for the sides.
8.      A code to identify its function.
9.      A network analysis problem to find out the voltage across a particular resistor.
10.   Which of the following are wrong. It had 4 options with the combinations of the following:
Setup time and Hold time - positive and negative.


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Technical round:
·        Questions on setup and hold time.
·        Questions on network analysis
·        On verilog coding- they may ask to write a code to generate a sequence and test bench for it.
·        Design a any counter!!
·        On opams(basics)
·        Blocking and non blocking assignments in verilog

·        Not a big deal when you have cleared the above two rounds,
·        Basic questiosn on your domain interest.
·        Facilities provided by company- stipend(very good).

This is a book that I highly recommend for anyone to improve on their soft skills. This will not just help in your interviews but also in your day-to-day work.



Finally, Cadence Internship selection is very easy compared to others.
But, remember to brush up with basics of analog and digital before you go !!


Intel Internship - Procedure and Questions


The Intel Internship selection consists of the following steps:
  1. Short-listing based on the resumes.
  2. Technical interviews for which you have been shortlisted.
  3. Finally the HR round.
The following are the questions that I remember during my Interview:
  1. Explain about the project that you have done in your UG program(They spend a lot of time on this).
  2. Draw a D flip flop using a T flip flop
  3. Draw a XOR gate using a MUX
  4. Write a verilog code for a 3 bit adder (ripple and carry both)
  5. Write a code to check whether the two 8 bit bus are same valued
  6. Construct a 16kB memory using 8kB memory
  7. Explain Setup and Hold time?
  8. Draw a CMOS inverter
  9. Explain grey code 
  10. Draw a K Map for the given Min terms and why do you swap 11 and 10 in K map
  11. How do you check if the given 1k memory is working properly ?
  12. 2-3 puzzles
  13. They asked me if I knew perl language
  14. They asked if I knew UNIX- asked how do you find particular text from the file--- which command do you use
  15. Scenario based question- Develop a manufacturing system in which we need to find whether a water bottle is full or no. If full then you have to cap the bottle and put the brand sticker /wrapper to it. If the water is not full the we need to fill the water to the appropriate level and when filled cap and wrap it. First write a C code for the same later he asked me to convert the same to a verilog code!!
  16. Divide by 2 and 4 frequency counter
  17. Difference between latch and a flipflop
  18. What is meta stable state and how do you overcome it?

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If you clear the Technical round then you go for the HR round. The HR round is just a formality and they try to learn more about you as an individual. Be free and frank but polite at the same time. (To read more about HR questions in other tech companies read here)

This is a book that I highly recommend for anyone to improve on their soft skills. This will not just help in your interviews but also in your day-to-day work.


All the Best!!
   

Carry Skip Adder MTech VLSI and Embedded Systems Semester 1 Lab


module CSA_task(Sum,Cout,A,B,Cin);

output reg [7:0] Sum;
output reg Cout;
input [7:0] A,B;
input Cin;
reg w1;
always @ (A or B or Cin)
begin
CSA_4bit (Sum[3:0],w1,A[3:0],B[3:0],Cin);
CSA_4bit (Sum[7:4],Cout,A[7:4],B[7:4],w1);
end
task CSA_4bit;
output [3:0] sum;
output cout;
input [3:0] a,b;
input cin;
reg [3:0] c,g,p;
reg sel;
begin
c[0]=cin;
sum[0]=a[0]^b[0]^c[0];
g[0]=a[0]&b[0];
p[0]=a[0]|b[0];
c[1]=g[0] | (p[0]&c[0]);
sum[1]=a[1]^b[1]^c[1];
g[1]=a[1]&b[1];
p[1]=a[1]|b[1];
c[2]=g[1] | (p[1]&(g[0] | (p[0]&c[0])));
sum[2]=a[2]^b[2]^c[2];
g[2]=a[2]&b[2];
p[2]=a[2]|b[2];
c[3]=g[2] | (p[2]&(g[1] | (p[1]&(g[0] | (p[0]&c[0])))));
sum[3]=a[3]^b[3]^c[3];
g[3]=a[3]&b[3];
p[3]=a[3]|b[3];
cout=g[3] | (p[3]&(g[2] | (p[2]&(g[1] | (p[1]&(g[0] | (p[0]&c[0])))))));
sel=(p[0]&p[1]&p[2]&p[3]);
if(sel)
cout<=cout;
else
cout<=cin;
end
endtask
endmodule

This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog

I suggest going through these books for Digital Electronics preparation:

Testbench:

module CSA_task_tb;
wire [7:0] Sum;
wire Cout;
reg [7:0] A,B;
reg Cin;
CSA_task CSA1(Sum,Cout,A,B,Cin);
initial
begin
A=8'b00000000;B=8'b00000000;Cin=0;
#100;
A=8'b00001111;B=8'b00001111;Cin=1;
#100;
A=8'b11110000;B=8'b11110000;Cin=0;
#100;
A=8'b11001100;B=8'b11001100;Cin=1;
#100;
A=8'b11001100;B=8'b00110011;Cin=0;
#100;
A=8'b10101010;B=8'b10101010;Cin=1;
#100;
A=8'b10101010;B=8'b01010101;Cin=0;
#100;
A=8'b11111111;B=8'b11111111;Cin=1;
end
endmodule

4-BIT CARRY LOOK AHEAD ADDER MTech VLSI and Embedded Systems Semester 1 Lab


Verilog Code:

//Design Carry look ahead adder using 4

module carry_look_adder(a,b,cin,sum,cout);
input [3:0] a,b;
input cin;
output [3:0] sum;
output cout;
wire g0,p0,g1,p1,g2,p2,g3,p3;
wire c1,c2,c3;
assign g0 = a[0] & b[0];
assign p0 = a[0] ^ b[0];
assign sum[0] = a[0] ^ b[0] ^ cin;
assign c1 = g0 | (p0 & cin);
assign g1 = a[1] & b[1];
assign p1 = a[1] ^ b[1];
assign sum[1] = a[1] ^ b[1] ^ c1;
assign c2 = g1 | (p1 & c1);
assign g2 = a[2] & b[2];
assign p2 = a[2] ^ b[2];
assign sum[2] = a[2] ^ b[2] ^ c2;
assign c3 = g2 | (p2 & c2);
assign g3 = a[3] & b[3];
assign p3 = a[3] ^ b[3];
assign sum[3] = a[3] ^ b[3] ^ c3;
assign cout = g3 | (p3 & c3);
endmodule

This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog

I suggest going through these books for Digital Electronics preparation:
Test Bench:

module tb;
reg [3:0] a,b;
reg cin;
wire [3:0] sum;
wire cout;
carry_look_adder R1 (a,b,cin,sum,cout);
initial
begin
a=4'b1100;
b=4'b1100;
cin=0;
#100;
a=4'b1110;
b=4'b1100;
cin=0;
end
initial
$monitor("a=%b,b=%b",a,b);
endmodule

Vedic Multiplier

module vedic( a, b, c );
input [1:0]a;// first input
input [1:0]b;// second input
output [3:0]c;// output
wire [3:0]c;
wire [3:0]temp; // four multiplication operation of bits according to vedic logic

assign c[0]=a[0]&b[0];
assign temp[0]=a[1]& b[0];
assign temp[1]=a[0]& b[1];
assign temp[2]=a[1]& b[1];

// using two half adders

ha z1(temp[0],temp[1],c[1],temp[3]);
ha z2(temp[2],temp[3],c[2],c[3]);

endmodule
This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog
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//code for Half adder
module ha(a, b, sum, carry); // a and b are inputs
input a;
input b;
output sum;
output carry;
assign carry=(a & b);
assign sum=a^b;
endmodule




code for traffic light controller


`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date:    09:48:37 12/17/2014
// Design Name:
// Module Name:    traffic
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////


// code foe traffic light controller
module traffic_lights;
reg clock, red, amber, green;
parameter on = 1, off = 0, red_tics = 30, amber_tics = 3, green_tics = 20;
initial red = off;
initial amber = off;
initial green = off;

always begin // sequence to control the lights.
red = on; // turn red light on
light(red, red_tics); // and wait.
green = on; // turn green light on
light(green, green_tics); // and wait.
amber = on; // turn amber light on
light(amber, amber_tics); // and wait.
end


task light;
output color;
input [31:0] tics;
begin
repeat (tics) @ (posedge clock);
color = off; // turn light off.
end
endtask


always begin // waveform for the clock.
#10 clock = 0;
#10 clock = 1;
end endmodule


This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog
I suggest going through these books for Digital Electronics preparation:




Array Multiplier 4 bit


`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date:    10:52:33 12/17/2014
// Design Name:
// Module Name:    array
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module array(A,B,p,rst);

input [3:0]A;
input [3:0]B;
output [7:0]p;
input rst;

reg [7:0]sum;
reg [7:0]sum1;
reg [7:0]sum2;
reg [7:0]sum3;


always@*
begin
if(rst)
begin
sum1 <= 8'b0;
sum2 <= 8'b0;
sum3 <= 8'b0;
sum <= 8'b0;
end


else
begin
sum  <= {4'b0,(A[3]&B[0]),A[2]&B[0],A[1]&B[0],(A[0]&B[0])};
sum1 <= {3'b0,(A[3]&B[1]),A[2]&B[1],A[1]&B[1],(A[0]&B[1]),1'b0};
sum2 <= {2'b0,(A[3]&B[2]),A[2]&B[2],A[1]&B[2],(A[0]&B[2]),2'b0};
sum3 <= {1'b0,(A[3]&B[3]),A[2]&B[3],A[1]&B[3],(A[0]&B[3]),3'b0};
end


end

assign p = sum + sum1 + sum2 + sum3;
endmodule

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I suggest going through these books for Digital Electronics preparation:








MTech VLSI and Embedded Systems Semester 1 - 4/8-BIT Adder / Substractor


Sum = A ⊕ B
Carry = AB

Verilog Code

module cra(a,b,cin,sum,cout);
input [7:0] a,b;
input cin;
output [7:0] sum;
output cout;
wire c1,c2,c3,c4,c5,c6,c7;
assign sum[0] = a[0] ^ b[0] ^ cin;
assign c1 = a[0] & b[0] | b[0] & cin | a[0] & cin;
assign sum[1] = a[1] ^ b[1] ^ c1;
assign c2 = a[1] & b[1] | b[1] & c1 | a[1] & c1;
assign sum[2] = a[2] ^ b[2] ^ c2;
assign c3 = a[2] & b[2] | b[2] & c2 | a[2] & c2;
assign sum[3] = a[3] ^ b[3] ^ c3;
assign c4 = a[3] & b[3] | b[3] & c3 | a[3] & c3;
assign sum[4] = a[4] ^ b[4] ^ c4;
assign c5 = a[4] & b[4] | b[4] & c4 | a[4] & c4;
assign sum[5] = a[5] ^ b[5] ^ c5;
assign c6 = a[5] & b[5] | b[5] & c5 | a[5] & c5;
assign sum[6] = a[6] ^ b[6] ^ c6;
assign c7 = a[6] & b[6] | b[6] & c6 | a[6] & c6;
assign sum[7] = a[7] ^ b[7] ^ c7;
assign cout = a[7] & b[7] | b[7] & c7 | a[7] & c7;
endmodule


This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog
I suggest going through these books for Digital Electronics preparation:
Test Bench:

module tb;
reg [7:0] a,b;
reg cin;
wire [7:0] sum;
wire cout;
cra R1 (a,b,cin,sum,cout);
initial
begin
a=8'b0000_0010;
b=8'b0001_0100;
cin=0;
#100;
a=8'b0000_0010;
b=8'b0001_0100;
cin=0;
#100;
a=8'b0000_0010;
b=8'b0011_0100;
cin=0;
#100;
a=8'b0000_0010;
b=8'b0011_0100;
cin=0;
#100;
a=8'b0000_0010;
b=8'b1111_0100;
cin=0;
#100;
a=8'b0000_1111;
b=8'b0000_0100;
cin=0;
#100;
end
endmodule

D flipflop

// code for dff module
Dff(input d,input clk,output reg q);
always @(posedge clk) // note: lines whithin the always block are executed sequententialy
begin
q<=d;
end
endmodule // code ends


This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog

I suggest going through these books for Digital Electronics preparation:

Robert Bosch Interview (Online test + Technical round + HR)


The selection procedure for Robert Bosch job is done in the following steps:
  1. On-line written test
  2. Technical interview
  3. HR round
On-line written test
  • Few aptitude questions
  • Technical questions on microcontroller, digital electronics, analog electronic - opams, CMOS,etc.
  • C language questions

Technical Round Questions
  1. Draw full wave rectifier circuit. Which is better bridge rectifier or centre tapped? 
  2. How to verify the health of the 1kb RAM without using checksum.
  3. Write a code for moving average when the input is analog data.
  4. Draw a memory map for accessing external ROM and write a code to access the external ROM.
  5. A puzzle: 2 buckets measuring 3 and 5 litres respectively. How do you measure 4 litres?
  6. Design a mod3 counter asynchronous.
  7. Transfer characteristics of a clipper was given and told to design the circuit.
  8. Draw the output waveform for a RC (also RL) circuit with a step input taking the outputs across R and C separately.
  9. Write a code to find the value of the 5th bit in a 8 bit register.(C code using static)
  10. Draw the architecture of 8051.
  11. Memory structure of RAM.
  12. Write a program to show the usage of stack operation.
  13. Define the types of storage classes in C and write a program for each.
  14. More questions on transfer curves. We need to design the circuit for it.
  15. Design a system by using any sensors, microcontroller if required (If you are using a microcontroller write a C program to interface the same )
  16. Problem statement: A bulb should glow whenever the bike driver accelerates the accelerator handle with the following conditions.
    • Bulb on when accelerating
    • Bulb off when decelerating.
    • Bulb off when accelerated and maintained a constant acceleration.
  17. More emphasis on projects :
    • If I have used a microcontroller I should justify why I have chosen that microcontroller and not any other.
    • How do you interface IR sensor to a microcontroller.
    • Block diagrams and in depth understanding of each blocks.
This is the best book to learn Digital Design using Verilog HDL, VHDL and System Verilog
I suggest going through these books for Digital Electronics preparation:
>

  1. Tell me about yourself and your family.
  2. Why should Robert Bosch hire you? (Tell 3 strengths with suitable examples to substantiate the same)
  3. Why do you want to work for Robert Bosch?
  4. Do you have any plans for further studies?
  5. What are your achievements in college so far?
  6. Have you participated in the Robert Bosch Inscribe? Tell me about the paper you submitted.
  7. Do you have any specific questions regarding the job?
This is a book that I highly recommend for anyone to improve on their soft skills. This will not just help in your interviews but also in your day-to-day work.